직접 합성법을 이용한 1차 시간지연 시스템의 2자유도 PID제어기 설계

Abstract

The PID controller basically consists of a linear combination of proportional, integral, and differential actions. Therefore, each parameter related to the three actions must be properly harmoniously tuned to satisfy the design specifications of the closed-loop system. If they are not properly tuned, the control performance of a system may deteriorate and in some cases cause significant damage to the control system. Despite the various advantages of the existing 1-DOF PID controller, there is a problem of conflicting relationship between response performance and stability, and there is a limit to simultaneously improving the set-point tracking and load disturbance rejection performances. In this paper, a 2-DOF PID controller based on direct synthesis method is proposed to simultaneously improve the set-point tracking and load disturbance rejection performances for first order plus time delay models, and how to tune the parameters of the PID controller is discussed. The 2-DOF PID controller consists of a PID controller for rejecting load disturbance in regulatory response and a set-point filter for reducing the overshoot in servo response, and the controller design focuses on improving load disturbance removal performance. The proposed direct synthesis method is a technique for analytically designing a PID controller so that the characteristic equation of a closed-loop transfer function for a control system matches that of a desired closed-loop transfer function. In controller design for rejecting load disturbance, three parameters of the PID controller can be obtained by matching the order and each coefficient of the desired characteristic equation with those of the characteristic equation obtained from a closed loop control system consisting of a PID controller and a process. The time delay term is approximated using Pade’s first-order equation. The desired characteristic equation comprises of multiple poles which are placed at the same desired location to reduce the number of adjustment parameters. In this way, the only adjustment variable of the PID controller is the time constant of the desired closed-loop transfer function. This adjustment variable should be appropriately selected so that the PID controller can compromise excellent response performance and robustness. When tuning the controller, the maximum magnitude MS of the sensitivity function directly related to the robustness of the controller is considered. When an MS representing a robustness level is determined, the time constant of the desired closed-loop transfer function should be adjusted accordingly. The guidelines are presented for cases where the MS is 1.6, 1.8, and 2.0 to provide convenience in selecting the time constant. In a stable process, if the value of this time constant is small, the response is fast and gives better results in load disturbance rejection, but the stability is poor. In addition, since the PID controller in this study focuses on load disturbance rejection, the overshoot may be large in the set-point tracking response. A set-point filter is derived from an output expression of a controller to reduce overshoot. To demonstrate the feasibility of the proposed 2-DOF PID controller, a simulation is performed on five stable FOPTD models, three higher-order processes, and two unstable FOPTD models and compared with the results of several existing methods. The MS value is kept the same for each process in order to impart fairness of the comparison. In addition, the parameter change of the PID controller according to the ratio of the time delay and the time constant of the process, the effect of the set-point filter, the performance change according to the MS, and the stability of the parameter uncertainty are examined.