저 위상잡음 PLDRO 설계 및 제작에 관한 연구

Abstract

Recently, there has been a growing interest in the development of microwave and millimeter wave communication system. These systems require actually minimization of the size, the weight and cost reduction in circuits. Especially, the resonator as an important part of a transmitter-receiver module must has the excellent characteristics than others, since it gives a direct effect on the whole system performance. The DR (dielectric resonator) is used often a resonator because it has high permittivity and high quality factor.

In this thesis, a PLDRO (phase locked dielectric resonator oscillator) of low phase noise has been designed and fabricated for 18 GHz microwave repeater of mobile communication system. A design algorithm of DRO (dielectric resonator oscillator) has been presented using an equivalent circuit model of dielectric resonator. A VCTDRO (Voltage controlled dielectric resonator oscillator) using the varactor diode and DRO at 7 GHz has been considered and fabricated. For a PLDRO, a SPD (sampling phase detector), loop filter, amplifier, and TCXO as a reference were employed and tested.

Based on the test result, the thesis shows that an output power of 10 dBm, 2nd harmonic of -51.27 dBc and phase noise of -98.61 dBc/Hz at 10 kHz and -102.03 dBc/Hz at 100 kHz has been observed.

The proposed PLDRO and the conventional product in terms of the characteristics of phase noise were compared and evaluated.