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여러 개의 하모닉을 억제하는 윌킨슨 전력 분배기
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김정훈 | - |
| dc.date.accessioned | 2017-02-22T06:42:11Z | - |
| dc.date.available | 2017-02-22T06:42:11Z | - |
| dc.date.issued | 2004 | - |
| dc.date.submitted | 56823-11-10 | - |
| dc.identifier.uri | http://kmou.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000002175462 | ko_KR |
| dc.identifier.uri | http://repository.kmou.ac.kr/handle/2014.oak/9688 | - |
| dc.description.abstract | In this thesis, a novel power divider is proposed that can suppress the 9 harmonic output. The power divider employs λ/4n 개방 스터브s, which are located at the 3λ/4 branches and parallel connection of resistor which shunts the output ports. According to experimental results, it was found that the power divider showed a harmonic suppression characteristic lower than -37dB for 9 harmonics output (1st to 9th harmonic), while maintaining the characteristics of a conventional Wilkinson power divider | - |
| dc.description.abstract | featuring an equal power split, a simultaneous impedance matching at all ports and a good isolation between output ports. The experimental results showed a good agreement with the simulation results. | - |
| dc.description.tableofcontents | Abstract ii Nomenclature iii 제 1 장 서 론 1 제 2 장 윌킨슨 전력 분배기의 설계이론 3 2.1 우모드 해석법 4 2.2 기모드 해석법 7 제 3 장 9개의 하모닉을 억제하는 윌킨슨 전력 분배기 9 3.1. T-type λ/4 등가회로 구현방법 9 3.2 π-type λ/4 등가회로 구현방법 14 3.3 λ/4 전송선로의 등가회로를 이용한 하모닉 억제 15 3.4 3λ/4 전송선로 등가회로를 이용한 하모닉 억제 18 제 4 장 시뮬레이션 및 측정 21 제 5 장 결 론 26 참고문헌 27 | - |
| dc.language | kor | - |
| dc.publisher | 한국해양대학교 대학원 | - |
| dc.title | 여러 개의 하모닉을 억제하는 윌킨슨 전력 분배기 | - |
| dc.title.alternative | Modified Wilkinson Power Divider for Multiple Harmonics Suppression | - |
| dc.type | Thesis | - |
| dc.date.awarded | 2004-02 | - |
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