한국해양대학교

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핸즈프리 통신을 위한 다중 채널 음성 픽업 임베디드 시스템 설계

Title
핸즈프리 통신을 위한 다중 채널 음성 픽업 임베디드 시스템 설계
Alternative Title
A Design of Multi-channel Speech Pickup Embedded System for Hands-free Communication
Author(s)
주형준
Issued Date
2006
Publisher
한국해양대학교 대학원
URI
http://kmou.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000002176385
http://repository.kmou.ac.kr/handle/2014.oak/10786
Abstract
Recently, The hands-free communication systems are required for the safety of driving in the environment of inside noisy automobile. Among the most popular hands-free algorithm, array processing algorithm is most widely used. Since the primary advantage of using an array is to enhance a desired signal and reject jamming interferences, array signal processing is essential to satisfy demand of user. In general, array beamforming algorithm is a spatial filtering operation performed on the data received by an array of sensors, such as antennas, hydrophones, or microphones. It provides a system with the ability to “listen” directionally even when the individual microphone in the array are omnidirectional. Therefore, in this thesis, the multi-channel speech pickup system using the array beamforming algorithm for enhancement of calling quality is presented. An FPGA system has better performance than any other system, which is multiprocessing systems with high-performance DSPs. This advantage is due to the simplicity of the core calculation, the limitations of the DSP’s address calculation hardware, and the ability to customize the I/O of the FPGA to the application. For real-time operation, the enhanced speech pickup (beamforming) hardware must calculate all of the beams of interest for each set of new samples
in other words, as implied by the computational requirements discussed earlier, all beams must be calculated at the sensor sample rate.

Therefore this thesis implements speech pickup system using the Nios-II processor with real-time I/O data processing speed. A Nios-II processor system is equivalent to a microcontroller or “computer on a chip” that includes a CPU and a combination of peripherals and memory on a single chip. Furthermore, this thesis describe method of designed using on-chip peripherals, and interfaces to off-chip memories and peripherals (SRAM, Flash memory, DMA, et al.).

To verify the effectiveness of implemented speech pickup system on Nios-II processor, the results of Niso-II processor are compare with results of computer simulation (MATLAB) and conventional DSP processor (TMS320C6711). According to the results of the speech pickup system on Nios-II processor showed a good agreement with those of computer simulation (MATLAB) and conventional DSP processor (TMS320C6711).
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전파공학과 > Thesis
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